A soft error upset (SEU), also known as a single event upset, refers generally to a change of state or a transient induced in one or more signal values in a semiconductor device (e.g., when struck by an ionizing particle, such as a neutron or an alpha particle). For example, a programmable logic device (PLD), such as a field programmable gate array (FPGA) or a complex PLD (CPLD), is configured by data stored in configuration memory cells (e.g., SRAM cells), which are susceptible to SEUs that change the originally programmed data state (e.g., programmed a “1” but SEU changes value to “0”). One or more SEUs within the PLD may be particularly noticeable because the data stored in the configuration memory cells determines the PLD's functionality.
Consequently, for example, a conventional PLD typically includes soft error detection (SED) logic (e.g., soft error intellectual property (IP)) that will read the configuration memory cells, such as in the background of a user mode of operation, and calculate a cyclic redundancy code (CRC) value to compare with a pre-calculated CRC value (e.g., CRC checksum). If the CRC values match, then there is no error in the values stored in the configuration memory cells. However, if the CRC values do not match, an error flag may be provided, which may for example trigger a reconfiguration of the PLD.
To test the SED logic's ability to detect a soft error (e.g., SED logic functionality), a typical procedure is to simulate a soft error in the PLD (as it is may be difficult to produce a real soft error in the hardware). For example, associated logic may be provided to the SED logic to simulate a soft error from one or more configuration memory cells, such as by changing a data value after it has been read from the configuration memory cell but before the CRC calculation is performed. However, the simulated soft error is not a true soft error condition and thus, may not accurately simulate and properly emulate a real (i.e., true) soft error, such as for example with respect to timing or other considerations.
As a result, there is a need for improved techniques for testing SED logic of programmable logic devices.
In one embodiment of the invention, a programmable logic device (PLD) includes configuration memory including a configuration memory cell; soft error detection (SED) logic adapted to check for an error in data stored by the configuration memory including the configuration memory cell by calculating a present data value for the configuration memory for comparison with a pre-calculated data value for the configuration memory; and a fuse configurable in a first logic state to enable the SED logic to read from the configuration memory cell in calculating the present data value of the configuration memory and configurable in a second logic state to prevent the SED logic from reading from the configuration memory cell in calculating the present data value.
In another embodiment of the invention, a method of testing SED logic for correct operation within a PLD includes writing data representing a soft error to a configuration memory cell with the configuration memory; and, with the SED logic, reading data stored in the configuration memory including the configuration memory cell; calculating from the read data a present data value for the configuration memory; and comparing the present data value with a pre-calculated data value for the configuration memory that does not include the soft error data written to the configuration memory cell. The SED logic is operating correctly if the present data value does not match the pre-calculated data value.
The scope of the invention is defined by the claims, which are incorporated into this section by reference. A more complete understanding of embodiments of the present invention will be afforded to those skilled in the art, as well as a realization of additional advantages thereof, by a consideration of the following detailed description of one or more embodiments. Reference will be made to the appended sheets of drawings that will first be described briefly.
Embodiments of the present invention and their advantages are best understood by referring to the detailed description that follows. It should be appreciated that like reference numerals are used to identify like elements illustrated in one or more of the figures.